1. Field of the Invention
The present invention relates to a synchronous rectification type switching power supply circuit. With improvement for lower voltage and higher current of LSI, the power supply circuit requires to be formed on a board with higher efficiency. As a method of improving the switching power supply, the secondary side rectifying circuit is generally formed as the synchronous rectifying circuit, but the synchronous rectification sometimes results in the function of an inverse converter that converts the power to the primary side from the secondary side due to the spread and suction of the power supply because parallel operation or various kinds of power supplies are used. The present invention has overcome the problems of the synchronous rectifying circuit with a circuit structure available in common even for various output power supplies of lower voltage.
2. Description of the Related Art
The power supply circuit of the synchronous rectifying system introduces the following systems.
(First System)
FIG. 18 illustrates a first structural example of the related art circuit. In the forward type switching power supply, the positive side in the secondary side of the transformer T is connected with the gate of control FETQ3 to control the gate of the forward side (rectifying) FETQ1, drain of the commutating FETQ2 and gate of the commutating FETQ2. The drain of FETQ3 is connected with the gate of the commutating FETQ2.
The load side of the secondary side of the transformer T is connected with the source of control FETQ3 and drain of forward side FETQ1 and the sources of FETQ1 and FETQ2 are connected and are then connected to the load terminal of the output. L is a choke coil and C is a smoothing capacitor. D9, D10 connected in the primary side of the transformer T are redundant diodes, allowing impression of a plurality of voltages. Q0 is the primary side switching FET (main switch) connected to the primary side of the transformer T. The sign xe2x97xaf given to the transformer T indicates the direction (polarity) of the winding.
The secondary coil voltage of the transformer T becomes 0V between the period of t3 and t4 indicated in the time chart illustrated in FIG. 19 and a gate voltage of the commutating FETQ2 is lowered to result in a large loss (dotted line portion). Therefore, an internal diode of FETQ3 rejects the discharge and holds the gate voltage of FETQ2 in the period t2 to t4. In the period t1 to t2, the commutating FETQ2 is turned OFF due to the short-circuit operation of FETQ3. In FIG. 19, (a) is the secondary side voltage of the transformer T, (b) is the gate-to-source voltage Vgs of the rectifying FETQ1 and (c) is the gate-to-source voltage of the commutating FETQ2.
In this circuit system, when a voltage is impressed to the output side, a bias is applied to the gate of the forward side FETQ1. Thereby, ON operation of the FETQ1 OFF operation of FETQ1 in the forward side occur alternately and thereby an ordinary self-oscillating circuit that repeats the switching operations operates like an inverse converter to start the power conversion to the primary side from the secondary side. The only way for suspending the self-oscillation is to stop the application of an external voltage.
In this circuit, when an output voltage becomes a low voltage power source, the voltage across the transformer T also becomes lower. Accordingly, there is no voltage to drive the FET, and therefore it is required to supply a voltage from the other winding.
(Second System)
FIG. 20 illustrates a second structural example of the related art circuit. The elements like those of FIG. 18 are designated with the like reference numerals. The structural example of this figure is a forward type switching power supply in which the secondary coil n2 and the tertiary coil n3 are provided in the transformer T. The gates of the synchronous rectifying FETQ1, Q2 and the cathodes of the diodes D1 and D2 are connected across the tertiary coil n3.
On the other hand, the sources of FETQ1, Q2 and anodes of the diodes D1, D2 are connected and also connected to the output terminal on the negative side. The drain of FETQ2 is connected to the positive side of the secondary coil n2 and this terminal is then connected to the output terminal in the positive side passing LC of the smoothing circuit. One side of the secondary coil n2 is connected with the drain of FETQ1.
With the switching operation, the FET gate voltage in the positive side of the tertiary coil n3 charges an internal FET gate capacity to turn ON FETQ1, thereby a forward current flows into the diode D2 connected to the negative side of the coil, forming a current route of the positive side. Moreover, the forward voltage of the diode D2 resets the gate-to-source voltage of FETQ2 and stops operation thereof. With the switching of the primary side, the terminal voltage of the transformer T changes alternately to alternately realize the operations explained above.
In this circuit system, the current transmitting side FETQ2 cannot be controlled within the period t2 to t3 with the voltage waveform of the secondary coil. Therefore, a flat transformer voltage waveform is necessary during the period t2 to t1 and an external circuit is further required resulting in a large loss.
However, this circuit is of the system for resetting the gate-to-source voltage of FET with a diode. However, since the gate voltage cannot be reset perfectly with the operation of diode, there rises a problem that both FETQ1, Q2 for synchronous rectification turn ON simultaneously and repeat unstable operations.
FIG. 21 is a time chart indicating operation waveforms of each portion of the second related art circuit. FIG. 21(A) indicates the ideal operation, while FIG. 21(B), actual operation, respectively. In the respective time charts, (a) indicates the secondary voltage of transformer T; (b), the gate-to-source voltage Vgs of FETQ1; (c), Vgs of FETQ2, respectively. In the case of ideal operation illustrated in FIG. 21 (A) Q1 and Q2 alternately repeat ON/OFF to perform correct synchronous rectification. Meanwhile, in the case of the actual operation illustrated in FIG. 21(B), Vgs of Q1, Q2 is so-called floated and thereby, the gate potential is not fixed and accurate ON/OFF operations of Q1 and Q2 cannot be realized.
(Third System)
FIG. 22 illustrates a third structural example of the related art circuit. In this example, the secondary coil n2 and the tertiary coil n3 of the transformer are connected in series in a flyback type power supply and FETQ1 is driven with the tertiary coil. In the flyback system, Q1 is turned ON with the tertiary coil voltage at the switching OFF time to output the excitation energy, of the secondary coil. In the switching ON time, the gate of FETQ1 is pulled to turn OFF with the electrode inversion of the tertiary coil n3. In this circuit, FETQ1 operates when an external voltage is applied from the output terminal for the self-oscillating operation.
The synchronous rectifying system uses FETs for rectification and since higher efficiency and reduction in size can be improved over the diode rectifying system of the related art, the synchronous rectifying circuit using FET in the power supply is mainly used. When a voltage is applied to the gate, FET allows a current to flow in the rectifying direction but since a current also flows in the inverse direction, the power supply may fail because of the following problems.
FIG. 23 is an explanatory diagram of inverse condition operation with an external voltage and the elements like those in FIG. 18 are designated with the like reference numerals. In this circuit system, an external voltage V1 is applied from the output terminal. In the circuit system of the related art, a gate voltage of FET is connected to the output terminal and when the synchronous rectifying FETQ1, Q2 are driven with the application voltage V1, the synchronous rectifying unit continues the self-oscillation because it is similar to the RCC power supply circuit in the saturated operation of the inductance of the transformer T.
When the self-oscillation starts, the circuit is connected with the FET internal diode D30 even if the switching control circuit and main FET stops operation and thereby it continuously operates as the inverse converter to the primary side from the secondary side. An inverse current is converted in the power to the primary side from the secondary side through excitation of the transformer T. In the structure where a redundant diode D10 is connected in the primary side, a current is rejected by D10. Therefore, the inversely converted energy increases the voltage in the primary side and thereby the circuit elements in the primary side fail.
Conditions thought as the case of such breakdown of elements is the parallel connection of the power supply output. FIG. 24 is an explanatory diagram of the parallel operations of the power supply. Numeral 40 designates a power supply apparatus and in this example, three power supplies from #0 to #2 are connected. When one unit (#2 power supply in the figure) of a plurality of power supplies 40 fails, a fault is detected and the voltage turns from the output terminal of the normal power supply, resulting in the inverse conversion. A defective power supply does not stop the operation and continues the inverse conversion operation. When an output is connected to the large current power supply, an absorption current also becomes large and the circuit elements will fail. Moreover, when a defective power supply operates to increase an output voltage, the output voltage turns into the normal power supply. Absorption is also generated due to the fluctuation of output voltage.
In a certain bus, a protection diode is connected and when there is a voltage difference in the power supply, a forward current flows through the protection diode to the lower voltage from higher voltage. FIG. 25 is an explanatory diagram for a turning current. When LSI is assumed as operating with the voltage A and voltage B, a current flows via the protection diode to the lower voltage A from the higher voltage B.
In the condition where there is a difference in the voltages A and B, the voltage A or B fails in output control. Therefore, a voltage difference is often generated when there is the period where any one of the voltages A and B is not driven while the power supply is operated or stopped and accordingly the synchronous rectifying circuit is often in the environment allowing the inverse flow of current.
As explained above, the synchronous rectifying circuit allows the inverse flow of current but since it is not provided with the circuit to detect and control the inverse flow, the power supply may fail. The problem in the operation of this circuit is that the synchronous rectifying circuit is the oscillation circuit driven with the other circuit for continuing the operation even if the switching control circuit stops and that the rectifying circuit is the circuit that cannot control the inverse flow of current.
When various output power supplies are required because the voltage of LSI becomes low, the synchronous rectifying circuit cannot drive FET with a lower voltage and the power supply circuit for drive is required. Development of different circuit structure for each output voltage provides various problems and therefore it is required to form the synchronous rectifying circuit that can be formed with a common circuit without relation to the output voltage is necessary.
The present invention has been proposed considering the problems explained above and an object of the present invention is to provide a switching power supply circuit of a simplified structure that can solve the problems such as unstable operation and breakdown of the synchronous rectifying circuit and may be used in common with a low voltage power supply.
FIG. 1 illustrates a preferred circuit diagram of the present invention. The elements like those in FIG. 16 are designated with the like reference numerals. In the figure, Q0 is an FET (primary side switching FET) operating as the primary side ON/OFF switch (main switch); T, a transformer. The transformer T is provided with the primary coil n1, secondary coil n2 and tertiary coil n3. Q1 is a rectifying FET and is connected in series with the secondary coil n2. The gate of Q1 is given the control signal from the tertiary coil. Q3 is a control FET connected to the tertiary coil and its gate is given the positive voltage of the tertiary coil n3.
Q2 is a commutating FET and the drain is connected to the positive side of the secondary coil and the source to the negative side thereof. The drain of the control FETQ3 is connected to the gate of the commutating FETQ2. L is a choke coil, C is a capacitor and these choke coil L and capacitor C form a smoothing circuit. 10 designates a switching control circuit for ensuring the ON/OFF operation of the rectifying FETQ1 and commutating FETQ2 and this switch control circuit is a characteristic part of the present invention.
According to the circuit structured as explained above, it is possible to provide the switching power supply of a simplified circuit structure that can solve the problems of unstable operation of synchronous rectification and breakdown of the apparatus and can also be used in common to the low voltage power supply by ensuring the ON/OFF operations of the rectifying FETQ1 and commutating FETQ2 with the switching control circuit 10.
The invention is further characterized in that the switching control circuit 10 is composed of an FET connected between the gate and source of the rectifying FETQ1, an FET connected between the gate and source of the commutating FET and a drive circuit for driving these FETs.
With the structure explained above, unstable operation of synchronous rectification and circuit breakdown can be solved by ensuring the ON/OFF operation of the rectifying FETQ1 and commutating FETQ2.
The invention is further characterized in that a current detecting unit detects an inverse current in the primary side of the transformer and is provided to turn OFF the primary side switching FET when the current detecting unit has detected an inverse current.
With the structure explained above, when the current detecting unit detects the start of the inverse conversion operation, operation of the primary side main switch (primary side switching FET) is stopped and circuit failure can be prevented.
In this invention, when the switching control circuit is composed of the FET connected between the gate and source of the rectifying FET, FET connected between the gate and source of the commutating FET, the drive circuit for driving these FETs and the diode connected between the source of rectifying FET and source of the control FET, the gate voltage of the commutating FET can be clamped with the diode explained above to realize high speed operation.
Moreover, in this invention, high speed operation can be attained through the control of the discharge of the gate of the rectifying FET and the charge and discharge route of the capacitor by connecting the control FET to the tertiary coil provided in the transformer, connecting the first control FET between the gate and source of the rectifying FET, connecting the second control FET between the source of the rectifying FET and gate of the first control FET and connecting a capacitor between the drain and source of the second control FET.
In the power supply circuit providing the switching circuit consisting of the rectifying FET for synchronous rectifying operation in the secondary side of the transformer in the flyback system switching power supply, a couple of control FETs for controlling the rectifying FET and the drive circuit for driving these control FETs.
Moreover, in the present invention, when a transistor that turns ON when the voltage across the current detecting means exceeds the threshold value is provided and the primary side switching FET is turned OFF when such transistor turns ON, the primary side switching FET is turned OFF to stop the operation thereof. Thereby, circuit failure can be prevented.
Moreover, in the present invention, the circuit operation can be stabilized by controlling, when the current flowing through the primary side of the transformer has exceeded the threshold value, an output to become small by reducing an interval with which the primary side switching FET turns ON, using a current transformer as the current detecting unit, converting an output current in the secondary side of the current transformer to a voltage and reducing the interval with which the primary side switching FET turns ON when both the forward current and backward current flowing in the primary side have reduced the threshold value.
Moreover, in the present invention, the circuit operation can be stabilized by controlling the ON time of the primary side switching FET in the case where an over-current or inverse current is detected, under the conditions that a current transformer is used as the current detecting unit, a resistor for converting the forward current and backward current in the secondary side of the current transformer to voltages is provided and the primary side switching FET is controlled with a difference of the voltages generated across these resistors.
Moreover, in the present invention, a self voltage is increased when the backward current is detected to prevent such backward current by providing a circuit that increases the self voltage to prevent backward current when a current transformer is used as the current detecting unit to detect the backward current due to an external application voltage.
Moreover, in the present invention, the switching FET operation can be stopped with a protection circuit such as an over-current detector because an output voltage can be artificially monitored with an auxiliary coil voltage by adding the auxiliary coil to the transformer.